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Software and Hardware Platforms Enable Over 1 TeraFlop Processing Rates

Computing applications have long used floating point numerical processing, including many in CPU architectures, which are mathematicallysuperior and support wide dynamic ranges. However, most embedded applications have traditionally used fixed point processing. Despitesignificantly increasing development complexity (often three times the time of floating point development), fixed point microprocessors,DSPs, and FPGAs can generally provide lower power consumption, lower costs, and in the case of FPGAs, much higher processing rates.

A new FPGA-based floating point flow is available that allows for the same high processing rate as enjoyed by fixed point applications to beachieved in floating point applications. A floating point co-processor which can be tightly coupled to FPGA hardware is also newly available,allowing both hardware and software floating point data processing to be leveraged. In addition, both of these new capabilities still supporthigh throughput, fixed point processing for the parts of the DSP datapath that do not need the dynamic range of floating point processing.The result is a processing platform that provides the advantages of both floating point and fixed point processing, while providing theflexibility to seamlessly partition and optimize the implementation between hardware and software.

Parallelism is a key advantage of a hardware solution like FPGAs, but it is often not applied to floating point signal processing because longlatencies make the data dependencies in algorithms such as matrix decomposition difficult to manage. Therefore, the resultant systemsoffered poor performance levels and were uncompetitive with other platforms such as GPU or multi-core CPU architectures.

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