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ISC 2017 Show New Product Announcements and Demonstrations

Thurs 15, June 2017
Contact: Marcus Weddle, BittWare
mweddle@bittware.com

Next week BittWare, along with partners Sarsen Technology (UK) and EMG2 (France), will exhibit at the ISC High Performance Computing show in Frankfurt, Germany booth A-1431. Please join us if you are able, but if not, we still wanted to share some of the things we will announce and demonstrate.
ISC 2017 - High Performance Computing Event

Sneak Peek: Spider and Viper Board PlatformsBittWare Spider Concept Board

 
FPGAs like Intel's Stratix 10 and Xilinx' VU13P provide enormous logic resources for today's demanding applications. When designers target these large FPGAs, they are naturally creating large loads--and often deploying in high-density datacenters with existing servers.
 
This combination of large FPGA loads (generating lots of heat) and standard server airflow limitations means targeting a particular FPGA shouldn't be your only concern--you need to consider the board's overall thermal design and performance.
 
With this in mind, we are announcing two new "platforms" for our PCIe FPGA boards: Spider for low-profile, single slot boards, and Viper for full-size, double slot boards. Spider and Viper platform boards are designed using sophisticated flow simulation to drive the physical layout in a "thermals first" approach. Boards are built using custom heat sinks with the latest heat pipe technology for passive cooling in standard servers, or with optional active cooling.
 
S10VG4 - Intel Stratix 10 GX 3/4-Length PCIe Board on BittWare's Viper Platform
A10SA4 - Intel Arria 10 GX Low Profile PCIe Board on BittWare's Spider Platform
XUPVV4 - Xilinx UltraScale+ 3/4-Length PCIe Board on BittWare's Viper Platform

Arkville DPDK IP CoreArkville DPDK IP Core for BittWare's Intel and Xilinx PCIe boards

High-performance data mover for Intel and Xilinx PCIe boards
 
Arkville, a new IP core from Atomic Rules, gives you access to an excellent PCIe data mover that optimizes for a balance of low-latency and high-throughput for data packets that need to move between the FPGA and CPU. We will demonstrate Arkville transfering an aggregate (Rx + Tx) 150+Gbps over a single PCIe Gen3 x16 interface on our XUPP3R board (which supports a second PCIe interface) with a Xilinx UltraScale+ FPGA.
 
The latest Arkville release supports DPDK 17.05, which is the first release under the Linux Foundation Project. The DPDK-aware nature of Arkville gives users an industry-standard platform in addition to a high-performance solution. Visit our Arkville DPDK IP core page to learn more.
 

OpenCL and Machine Learning DemoBittWare OpenCL and Machine Learning Demo

 
Our A10PL4 PCIe board is a low-profile, single-slot design with the powerful Intel Arria 10 FPGA, supporting both HDL and OpenCL development environments.
 
The advantage of OpenCL (which is used for this demo) is that it allows for shorter development time, quicker field updates, and a wider base of programmers.

The demonstration shows a convolutional neural network (CNN) trained on ImageNet using the 2012 AlexNet model, with the FPGA accelerating image recognition (inference) at over 900 frames per second. Visit our product page on the A10PL4 to learn more.
 
You can catch up with Kevin Beach from Sarsen Technology at ISC 2017, please get in touch to arrange a meeting.

 



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