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XUPPL4 Xilinx UltraScale+ PCIe Board


Xilinx Virtex UltraScale+ Low-Profile PCIe Board with Dual QSFP and DDR4

The XUPPL4 from BittWare is a low-profile PCIe x16 card based on the Xilinx Virtex UltraScale+ FPGA. The board offers up to 32 GBytes of memory, sophisticated clocking and timing options, and two front panel QSFP cages, each supporting up to 100 Gbps (4×25) – including 100GbE.

The Xilinx UltraScale+ FPGAs are built on 16 nm process technology using 16FF+ FinFET 3D transistors delivering high-performance, high-bandwidth, and reduced latency for systems demanding massive data flow and packet processing.

All of these features combine to make the XUPPL4 ideal for a wide range of data centre applications, including network processing and security, acceleration, storage, broadcast, and SigInt.


  • Xilinx Virtex UltraScale+ VU3P
  • PCIe x16 interface supporting Gen1, Gen2, or Gen3
  • PCIe x8 interface supporting Gen4
  • Two QSFP28 cages for 2x 100GbE, 2x 40GbE, 8x 25GbE, or 8x 10GbE
  • Memory: up to 32 GBytes of DDR4 SDRAM with ECC (x72)
  • Board Management Controller for Intelligent Platform Management
  • Precision timestamping support
  • Utility I/O: USB 2.0


Board Specifications


  • Virtex UltraScale+ VU3P
  • 24x GTY transceivers at 32.75 Gbps
  • 862K logic elements
  • 115 Mb of embedded memory
  • 2 integrated PCIe cores
  • 2,280 DSP slices with 27×18 multipliers

On-Board Memory

  • Two banks of up to 16 GB DDR4 (x72)
  • Flash memory for booting FPGA

PCIe Interface

  • x16 Gen1, Gen2, Gen3 interface direct to FPGA
  • x8 Gen4 to FPGA

USB Header

  • Micro USB port (USB 2.0) for BMC access and programming Flash

QSFP Cages

  • 2 QSFP28 (zQSFP) cages on front panel connected directly to FPGA via 8 transceivers
  • Each supports 100GbE, 40GbE, 4x 25GbE, or 4x 10GbE
  • Backward compatible with QSFP and can be optionally adapted for use as SFP+


  • 1 PPS input/output
  • Reference clock input/output

Board Management Controller

  • Voltage, current, temperature monitoring
  • Power sequencing and reset
  • Field upgrades
  • FPGA configuration and control
  • Clock configuration
  • I2C bus access
  • USB 2.0
  • Voltage overrides


  • Low profile (Half-height, half-length) PCIe slot card; x16 mechanical

Development Tools

System Development

  • BittWorks II Toolkit – host, command, and debug tools for BittWare hardware; Matlab API; source code porting kit also available

FPGA Development

  • FPGA Example Projects
    • PCIe Gen3x16 Base Project
    • PCIe DMA
    • DDR4
    • SerDes (iBERT)
  • Xilinx Tools
    • Vivado® Design Suite
    • USB to JTAG converter

Ordering information

Please contact Sarsen Technology to discuss configuration options?



Associated products