General

• ADC and DAC sample rates up to 64.0 GSps!
• Capability to have two ADC and two DAC channels in one 3U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
• Capability to have four ADC and four DAC channels in one 6U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
• Compatible with any WILDSTAR mainboard with a WFMC+ slot
• Supports JESD204B/C interface with 32 lanes up to 30Gbps
• Firmware and Software for four channel data transmit interface and clock trigger synchronization provided in CoreFire Next and VHDL source

ADC Performance

• 64GSps ADC Speed Grade
• 2 Channels
• 10 Bits Resolution
• Analog Bandwidth: 36GHz
• Run Time Selectable ADC Decimation: 8-1024x
• Adjustable attenuation: 1-60 dB

DAC Performance

• 64GSps DAC Speed Grade
• 2 channels
• 10 Bits Resolution
• Analog Bandwidth: 36GHz
• Run Time Selectable DAC Interpolation: 8-1024x
• Adjustable attenuation: 1-60 dB

Clock Performance

• Software-selectable external clock input or onboard PLL clock
• Run Time Clock Source Selection
  • External Reference Clock
  • Internal PLL with Run Time Selectable Reference Source
    • External RF Connector
    • Internal Oscillator
    • Mainboard/Backplane provided Reference

I/O Connectors

• Six 50Ω Front Panel or VITA 67 Connectors
  • Two Analog ADC Inputs
  • Two Analog DAC Outputs
  • One External Sample Clock Input
  • One High Precision Trigger Input
    • 2.5V LVPECL
    • 3.3V LVPECL
    • 2.5V LVCMOS
    • 3.3V LVCMOS

Clock Synchronisation

• All ADCs and DACs across multiple mezzanine cards can be synchronized using WILDSTAR Clock Distribution Boards and select WILDSTAR Backplanes

Mechanical and Environmental

• Integrated Heatsink and EMI / Crosstalk Shieldsw
• Commercial and Industrial Temperatures Available
• Air Cooled, Conduction Cooled and Air-Flow-Through Cooled supported