Events

SIFMA Tech 2013 - BittWare - NYC

Event Dates: June 18th 2013 - June 19th 2013

Throughout its venerable 30 year history, SIFMA Tech has brought together several thousand financial service firms and their technology providers. In 2013, they will once again be convening industry leaders, regulators and solution providers but in a new and improved forum.

BittWare and Altera will be on booth 1115 at SIFMA Tech 2013, where they will be showcasing BittWare’s OpenCL development support and Altera Stratix V FPGA boards designed for low-latency financial trading applications.

The Low-Latency Summit 2013 - London

Event Dates: February 19, 2013 (All day)

Continuing with the theme of Converging Technologies for Automated Trading, the Low-Latency Summit focuses on the evolution of high performance technology underpinning profitable automated trading strategies, with a focus on real life experience from the European marketplace. Delegates will learn how to combine low-latency connectivity and processing technologies with those for managing big data and cloud delivery to implement the next generation platforms for success in tomorrow's trading markets. This is the only event for the financial markets to coherently connect these strategic technologies and align them to the trading process.

Alongside the conference program, an exhibits area will allow real-life solutions to be demonstrated, and networking to take place during the breakfast, luncheon, beverage breaks and reception.

Come and meet the BittWare & Sarsen Technology teams on stand 105 to learn more about the very latest Altera Stratix V FPGA hardware and software technology including the OpenCL tools designed for low-latency financial trading applications. Full details of the event can be found on the www.low-latency.com web site. We look forward to seeing you there.

OpenCL For Altera FPGAs

Date: February 6th – 7th, 2013

Location: Radisson Blu, Heathrow – UK

Time: 9:00am – 5.30pm

Cost: £1,050/delegate

Are you curious about using the Open Computing Language (OpenCL) with Altera FPGAs?

This top rated training from Acceleware enables you to apply techniques for parallel programming in OpenCL to Altera FPGAs. The course is taught by experienced OpenCL programmers who are skilled in developing commercial applications using OpenCL. Acceleware's customised OpenCL training consists of classroom lectures and several practical hands-on exercises. In this class you will be introduced to the Altera SDK for OpenCL and learn how to target Altera’s massively parallel FPGA architecture utilising the productivity gains of OpenCL.

Agenda:

• Compiling OpenCL kernels for Altera FPGAs
• Throughput and size trade-offs
• Memory optimisations
• Optimisation case studies
• OpenCL architectures: compare and contrast

Prerequisites:

• Experience of programming in OpenCL
• Familiarity of parallel program concepts

The course fee includes:

• Use of a laptop equipped with Altera’s SDK for OpenCL
• Manuals of all lectures
• Electronic copy of lab exercises
• OpenCL quick reference card
• Certificate of completion
• Refreshments and lunch each day

Please contact Sarsen Technology for details.