'A bad workman blames his tools', so the saying goes. So a good workman will praise his tools.
The October meet up of the NMI FPGA Network will share experiences of how design tools and methodologies impact the schedule, solve difficult problems, affect quality, optimise architecture, bridge hardware and software communities.
It will provide a stage for end users (the good workmen) and solutions and service providers (also good workmen) to praise what works well so all can benefit from the knowledge.
Synopsys: Flexible debug and visibility techniques to enhance all FPGA design and deployment cycles
Mentor Graphics: Staying competitive by evolving your FPGA verification methodologies
Cadence: 100M gate designs in FPGAs – Fact or Fiction?
BittWare: FPGA platform development kit enables fast TTM
Telexsus: FPGA real-time debug with vastly increased operational capture time – live demo
**Please note, the Event web-page will be updated as new presentations are confirmed**
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