Atlantis Framework Overview

ATLANTiS Architecture

Overview and Implementation for BittWare T2 ADSP-TS201 Board Family

By Jeffry Milrod, BittWare, Inc. March, 2004 (Updated July, 2005)

BittWare recently introduced its T2 family of DSP boards, which are based on the 500 MHz ADSPTS201S TigerSHARC processor. At the heart of each of these boards is a scalable architecture called ATLANTiS (Advanced Transfer Link Architecture for New TigerSHARC). ATLANTiS tightly integrates four TigerSHARC processors, a variety of I/O peripherals, and an on-board FPGA to offer an unprecedented 4 GB/sec of I/O bandwidth, as well as many options for configuring and routing I/O. This white paper gives an overview of the ATLANTiS architecture and discusses how it is implemented on BittWare’s T2 boards.

BittWare’s ATLANTiS architecture is implemented on the T2 Family of boards. Prior to exploring ATLANTiS, it is important to understand the basic features of the T2 Family.

T2 Board Overview

The T2 family features PCI-X, PMC, 6U Compact-PCI, and VME boards, all of which feature the ATLANTiS architecture. Depending on the formfactor,the boards support either a single or a double ATLANTiS architecture. This paper discusses the single ATLANTiS architecture.

Each T2 board matches clusters of four ADSPTS201 TigerSHARCs with:

• High-bandwidth, low-latency off-board I/O, reconfigurable for nearly any application
• High-speed interprocessor communication network to facilitate scalability
• Xilinx Virtex-II Pro FPGA for I/O routing and algorithm implementation
• SharcFIN PCI-DSP bridge for integrating DSPs with PCI bus and other peripherals
• Comprehensive software for ease-of-use

Each board also provides a large on-board bank of SDRAM, flash memory for hostless boot, and a PMC site for adding additional processors or I/O capabilities.

To read more, click the link below

 ATLANTiS Framework Overview