SUMIT Interconnect

SUMIT Interconnect

WHITE PAPER - High-Performance Embedded Applications: The SUMIT Standard

By Bruce D. Virell, Product Manager, VersaLogic Corp. Version 1.7, December 2009

Introduction: Defining the Problem

Designers of high-performance embedded systems need to incorporate growing numbers and types of I/O in smaller and smaller off-the-shelf and semi-custom boards, while keeping their design platforms flexible enough to accommodate a variety of designs, including some that must maintain compatibility with legacy I/O.

Demand for processing performance and higher bandwidth is increasing while space and power constraints are getting tighter. Many applications now require faster throughput associated with the PCI Express bus, and primarily address either newer video (HDMI) and/or high-speed Ethernet applications.

This is especially true in video-intensive situational awareness military applications that utilize picture-in-picture and mapping overlays, as well as in video- and 3D-intensive medical applications, such as virtual colonoscopy, MRIs, CT scans, and digital mammography. Demands for connectivity and communications capability in these applications are growing, such as in systems used in the Department of Defense’s Global Information Grid, which requires a robust networked force for improved information sharing, or in medical networks that give patients access to the digital data of test results.

Developers of both medical and military applications are looking for a small footprint, compact modular size, and the ability to use the multitude of existing expansion modules available today. They want to be backward-compatible with legacy devices in the installed base, while still supporting a hardware environment that will accommodate very high speed devices.

Although space, power, bandwidth and performance issues are being addressed in semiconductor electronics at the CPU and chipset level, designing boards with new 45-nm technologies such as Intel’s Atom processor has still been a challenge. This challenge is caused primarily by mechanical and connector issues, as well as the sheer number of buses that must now be accommodated to cope with the proliferation of I/O, including PCI Express, Universal Serial Bus (USB), Serial Peripheral Interface (SPI), Low Pin Count (LPC), System Management Bus (SMBus), and ExpressCard.

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 SUMIT Interconnect