General

• Dual Channel 12-bit ADC/DAC running at up to 3.2GSps each
• Single Channel 12-bit ADC/DAC running at up to 6.4GSps each
  • Internal PLL must be used – external clock not supported for this mode
• Ultra Low and Deterministic Latency from ADC SMA input to DAC SMA output
• Digital Bypass Mode has built-in run-time adjustable delay providing additional delay from 0ns up to 124 Sclk periods
• Up to two ADC and two DAC channels in one 3U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
• Up to four ADC and four DAC channels in one 6U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
• Compatible with any WILDSTAR mainboard with a WILD Mezzanine Card LVDS (WMC-L) Site
• Firmware and Software Board Support Interface provided in Open CoreFire Next and VHDL source

• Dual Channel 12-bit ADC/DAC running at up to 3.2GSps each
• Single Channel 12-bit ADC/DAC running at up to 6.4GSps each
• Internal PLL must be used – external clock not supported for this mode
• Ultra Low and Deterministic Latency from ADC SMA input to DAC SMA output
• Digital Bypass Mode has built-in run-time adjustable delay providing additional delay from 0ns up to 124 Sclk periods
• Up to two ADC and two DAC channels in one 3U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
• Up to four ADC and four DAC channels in one 6U OpenVPX slot when plugged into WILDSTAR OpenVPX FPGA mainboards
• Compatible with any WILDSTAR mainboard with a WILD Mezzanine Card LVDS (WMC-L) Site
• Firmware and Software Board Support Interface provided in Open CoreFire Next and VHDL source

• Channels: 1 or 2
• Max Sample Rate: 6.4GSps (Single Channel) and 3.2GSps (Dual Channel)
• Resolution: 12 bits

• Six 50Ω VITA 67 Connectors
• Two Analog ADC Inputs
• Two Analog DAC Outputs
• One External PLL Reference Input
• One Differential External Clock Input

• Integrated Heatsink and EMI / Crosstalk Shields
• Commercial and Industrial Temperatures Available
• Air, Air-Flow-Through or Conduction Cooled

• Software-selectable external clock input or onboard PLL clock
• All ADCs and DACs across multiple mezzanine cards can be synchronized to the same sample using WILDSTAR Clock Distribution Boards