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WC3A80


Overview

8 Slot 3U OpenVPX 100GbE SOSA-Aligned ATR Chassis

The rugged WILD100 8-Slot 3U OpenVPX SOSA™-Aligned ¾ Air Transport Rack (ATR) from Annapolis Micro Systems is a 100Gb Ethernet-enabled COTS 3U VPX Chassis, Backplane, and secure Chassis Manager.

The 8-slot forced-air, conduction-cooled unit incorporates slots for up to four conduction-cooled 3U VPX Payload Boards, 100GbE Switch, Clock Distribution Card, I/O-intensive SBC, and VITA 62 power supply.

The Chassis Manager is VITA 46.11/SOSA-aligned and utilizes a Xilinx UltraScale+ ZU5EG or ZU11EG MPSoC.

For a benchtop version of similar capability, see the WILD100 7-Slot 3U OpenVPX Chassis (WC3170).

Technical

Chassis and Backplane

  • ¾ ATR Short Length, Tall Height Chassis
  • SOSA-aligned
  • Rugged top-loading and air-cooled, with conduction-cooled slots
  • 8 3U OpenVPX Slots
    • 4 Payload Slots with 14.6.11 profile
    • 1 Clock Slot with 14.9.2 profile
    • 1 I/O-intensive SBC Slot with 14.2.16 profile
    • 1 40/100GbE Switch Slot with 14.4.14 profile
    • 1 12V-only VITA 62 Power Supply Slot
  • Input power is 28VDC per MIL-STD-704F
  • 25 Gbps Line Rates on Data and Expansion Planes
    • 25/40/100Gb Ethernet
    • SDR/DDR/QDR/EDR Infiniband
    • Gen 3/4 PCI Express
    • Custom protocols up to 25Gbps per lane
  • VITA 66.5C and VITA 67.3C for payload slots
  • Integrated ultra-low skew AUXCLK/REFCLK radial distribution
  • Chassis manager connector handles JTAG, maintenance ports (UARTs) and control
  • Up to 2 MIL-DTL-38999 SOSA-aligned circular connectors with 19 RF connections each
  • Up to 1 MIL-DTL-38999 SOSA-aligned circular connectors with four 24 Fiber MT connections each
  • Up to 2 dual redundant MIL-STD-1553 interfaces supported
  • LED Status Indicators
  • Chassis supports operation from -40 to 70°C and storage from -50 to 85°C ambient air
  • Rugged high velocity fan for cooling

WABGM0 or WABGM2 Chassis Manager

  • SOSA-aligned and VITA 46.11 compliant
  • Xilinx UltraScale+ ZU5EG or ZU11EG MPSoC running Linux for CHmC
    • Processing Subsystem (PS)
      • Quad core A53 ARM running at 1.2 GHz
      • Dual core R5 ARM
      • 4GB DDR4 DRAM
      • 128MB QSPI NOR
    • Programmable Logic subsystem (PL)
      • Up to 633K System Logic cells in Programmable Logic
      • Up to 2GB DDR4 DRAM
      • Up to 22.5Mb of UltraRAM
      • 128MB QSPI NOR
      • Dual 128KB battery backed NV SRAM
  • MicroSemi Polarfire MPF200T for security functions
    • 192K Logic Elements
    • 13.3 Mb Internal RAM
    • 297Kb internal uPROM bits
    • Boots from internal flash
    • SPI NOR for in system updates
  • Integrated JTAG access/control from chassis manager to each slot
    • External JTAG connection with SW selectable multiplexing from each slot
    • Xilinx JTAG over ethernet via Chassis Manager
  • Multiple security and advanced features available, contact factory for details

Application Development

  • Standard Chassis Manager support delivered with all systems
    • IPMI Chassis Manager support with redundant IPMB
      • VITA 46.11 conformant and SOSA-aligned
      • Tier 2 Chassis Manager with support coming for Tier 3
    • Chassis voltage and temperature sensor monitoring
    • Fan control and monitoring
    • UART support to payload cards
    • JTAG support to payload cards
  • Optional Full Board Support Package for Chassis Manager
    • Enables customization if needed of Zynq PS, PL
    • Provides fast and robust HDL-based application development environment

Ordering information

There are a number of configurations available. Please contact Sarsen to discuss your application requirements.

NEWS

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