Technical
The WS3SN0 is a SOSA aligned 3U data storage solution from Annapolis featuring up to 32 TB storage depth, and up to 5 GB/sec bandwidth, plus additional depth and bandwidth capacity using multiple cards.
One Xilinx® Zynq® UltraScale+™ MPSoC ZU11 Motherboard Controller allows stand-alone operation, and supports multiple levels of hardware and software security.
The board has a rugged design and is available in industrial temperature grades. Optional air, conduction, air-flow-through, and liquid-cooled environments are also available.
High-bandwidth backplane connectivity is enabled by MULTIGIG RT3 interconnects, which deliver 100Gb per Fat Pipe.
The 3SN0 is part of Annapolis’ growing WILD100 EcoSystem™, an interoperable portfolio of rugged high-performance 100Gb VPX COTS boards and systems.
Specifications
General Features
- 8.0 / 16.0 / 32.0 TB storage depth in a single 1” 3U slot
- Data rates up to 5 GB/sec read and write
- Scalable Depth and Bandwidth using multiple Storage Cards
- Supports NVMe over Fabrics for Network Attached Storage
- Multiple types of encryption supported
- Hot Swappable with 10,000 Insertion Cycles (exclusive to WILD OpenVPX EcoSystem)
- Developed in alignment with SOSA™
One Xilinx® Zynq® UltraScale+™ MPSoC ZU11 Motherboard Controller
- Allows for non-PCIe based interfaces such as 100GbE or user defined protocols
- Includes 100GbE IP
- Allows stand-alone operation
- Processing Subsystem (PS)
- Quad-core 64-bit ARM® Cortex-A53
- Dual-core 32-bit Cortex-R5 real-time processor
- Mali-400 MP2 graphics processing unit
- One 64-bit, 4 GB DDR4 memory
- 256Kb user SPI FRAM
- Programmable Logic (PL)
- Up to 2928 DSP slices or 1,143,00 logic cells
- Up to 36Mb of High Bandwidth, Low Latency UltraRAM
- Gen3 PCIe, 150G Interlaken and 100Gb Ethernet Hard Cores
- GTH/GTY transceivers operating up to 32.75 Gb/s
- 256Kb user SPI FRAM
- 16nm FinFET+ process
- Board support enabling user customization of ZYNQ+ design
- Multiple levels of hardware and software security
Backplane I/O
- Backplane I/O using PCIe or 100Gb Ethernet
- Dual 4x PCIe Gen3 backplane interfaces
- On-board PCIe Gen3 switch
- Allows daisy chaining of boards without system switch in chassis
System Management
- 3U OpenVPX (VITA 65) Compliant, 1” VITA 48.1 spacing
- Current, Voltage and Temperature Monitoring Sensors
- Front panel status LEDs for drives and PCIe link status
- Proactive Thermal Management
Application Development Board Support Package
- Open Project Builder Application Design Suite
- Full Board Support Package for Fast and Easy Application Development
- Computational, DSP and Data Flow Control Cores (FFTs, FIR, Math, etc)
- Develop in GUI environment or create VHDL and use HDL environment
- Built-in Debugger for Hardware in the loop Debugging
- Communication Cores Included (10/40/100Gb Ethernet, AnnapMicro Protocol)
- VHDL Model includes Source Code for Hardware Interfaces
- Supports High-Level Synthesis (HLS) Design Flow
- VHDL BSP packages including full synthesis and simulation support
- Support for Mathworks HDL Coder™ generated IP
Mechanical and Environmental
- 3U OpenVPX Compliant 1.0″ spacing
- Optional VITA 66 support
- RT3 backplane connectors for 100G support
- Integrated Heat Sink and Board Stiffener
- Available in Industrial Temperature Grades
- Available for Air, Conduction, Air-Flow-Through, and Liquid-cooled environments
- RTM available for additional I/O
- Hot Swappable (exclusive to WILD OpenVPX EcoSystem)
- Only requires +12V and Optionally +3.3VAUX from backplane
- Developed in alignment with the SOSA™ Technical Standard
Ordering information
There are a number of configurations available. Please ask us about the best fit for your application.
LOG IN /
